Allo's Revolution DAC is the result of an ambitious project: to offer a DAC capable of achieving consensus both among audiophiles who are interested by measurement performance and among audiophiles who are interested by the listening experience performance.

To do this, the Allo technical team undertook a vast in-depth reflection on integration techniques promoting minimal distortion + noise (-114.5dB) and homogeneous over the entire audible spectrum while simultaneously conducting research focused on subjective appreciation in the listening experience. Revolution DAC technology and design revolves around a principle of maximizing THD performance (-123dB) where this factor is adressed independently of noise (N).

DAC ES9038 Chip

At the heart of the Revolution DAC is an ES9038 DAC chip. This component is one of ESS flagship products and belongs to the best current hardware solutions for high-fidelity audio decoding, notably with the famous HYPERSTREAM 32 BIT architecture. This chip is also equipped with advanced reconstruction filters and has excellent finesse in dithering.

ESS technology is also very popular in that it allows extremely precise volume control that respects the digital signal.

The integration of the ES9038 chip within the Revolution DAC circuit was the subject of a specific development in order to cancel the "ESS bump" by passive filtering of high-frequency noise. This allows it to take advantage of all the qualities of ESS technology without creating listening fatigue.

The Revolution DAC is very easy to use thanks to its Micro-USB input. It can connect directly to any digital source with a USB-A output using its (supplied) data cable.

Interface USB XMOS, dual clock and synchronization options

The USB-C input uses a USB XMOS U208 interface. This is a reference component in the field of high-fidelity music, natively supporting very high definition digital streams as well as DSD streams.

The USB interface can work in both synchronous and asynchronous mode. That is to say that the user can opt for a clock reference determined by an integrated circuit with duo of high precision NDK SDA clocks. In this mode, the Revolution DAC generates its own clock signal (ESS 128fs mode) in order to exempt the signal path from any DPLL type processing (phase loop) and to avoid digital noise as much as possible.

In its asynchronous mode, the decoding circuit operates in slave mode of the source and the DAC chip activates the proprietary ESS jitter reduction algorithm at low level for a very neutral effect.

Harmonic processing and oversampling filter options

By default the Revolution DAC is in a configuration favoring THD performance. However the device also offers a mode intended to underline second and third order harmonics in order to cover the expectations of audiophiles sensitive and favorable to the effects of euhponia. It is therefore possible to alternate between a mode optimizing measurable performance and a mode optimizing converging trends in subjective listening preferences.

The device also offers to completely bypass the oversampling filter to allow the user full control over the processing treatments applied to the digital signal. Please note, this functionality is not compatible with hardware volume control and makes it impossible to lower / raise volume as long as this filter is disabled.

Access to the options is facilitated by a display and a control panel located on the front. These allow you to configure and verify the correct configuration of the volume and all advanced parameters.